Publications

Below is a list of publications from our RISE academic partners. Use the search function to filter results based on topic area.

Publications List<strong>
Addressing Side-Channel Vulnerabilities in the Discrete Ziggurat Sampler
Brannigan, S., O'Neill, M., Khalid, A., & Rafferty, C.
In 8th International Conference on Security, Privacy, and Applied Cryptography Engineering: Proceedings (pp. 65-84). (Lecture Notes in Computer Science). Springer-Verlag, 2019.
A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation
Gu, C., Liu, W., Cui, Y., Hanley, N., O'Neill, M., & Lombardi, F.
In IEEE Transactions on Emerging Topics in Computing (TETC), 2019.
A Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs.
Gu, C., Chang, C. H., Liu, W., Hanley, N., Miskelly, J., & O'Neill, M. (Accepted/In press). In Workshop on Attacks and Solutions in Hardware Security (ASHES), 2020.
A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication
Gu, C., Chang, C. H., Liu, W., Yu, S., Ma, Q., & O'Neill, M. (Accepted/In press). In Asian Hardware Oriented Security and Trust Symposium (AsianHOST) IEEE, 2020.
An Improved Automatic Hardware Trojan Generation Platform
Yu, S., Liu, W., & O'Neill, M. In IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (pp. 302-307), 2019.
Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study
Fang, Y., Ma, Q., Gu, C., Wang, C., O'Neill, M., & Liu, W. In 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (pp. 394-397), 2019
Design and Analysis of Majority Logic Based Approximate Adders and Multipliers.
Liu, W., Zhang, T., McLarnon, E., O'Neill, M., Montuschi, P., & Lombardi, F. In IEEE Transactions on Emerging Topics in Computing (TETC), 2019.
Error Samplers for Lattice-Based Cryptography - Challenges, Vulnerabilities and Solutions.
Khalid, A., Rafferty, C., Howe, J., Brannigan, S., Liu, W., & O'Neill, M. In IEEE Asia Pacific Conference on Circuits and Systems (APCCAS): 26/10/2018 → 30/10/2018 Chengdu, China IEEE, 2019.
High Performance Modular Multiplication for SIDH.
Liu, W., Ni, Z., Ni, J., Rafferty, C., & O'Neill, M. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019.
Lattice-based Cryptography for IoT in A Quantum World: Are We Ready?
Khalid, A., McCarthy, S., O'Neill, M., & Liu, W. In Proceedings - 2019 8th International Workshop on Advances in Sensors and Interfaces, IWASI 2019 (pp. 194-199). [8791343] IEEE, 2019.
Multi-Incentive Delay-based (MID) PUF.
Zhang, Z., Gu, C., Cui, Y., Zhang, C., O'Neill, M., & Liu, W. In IEEE International Symposium on Circuits and Systems (ISCAS) (Vol. 2019-May). [8702678] Institute of Electrical and Electronics Engineers Inc., 2019.
Optimised Schoolbook Polynomial Multiplication for Compact Lattice-based Cryptography on FPGA.
Liu, W., Fan, S., Khalid, A., Rafferty, C., & O'Neill, M. In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1-5, 2019.
Optimized Modular Multiplication for Supersingular Isogeny Diffie-Hellman.
O'Neill, M., Liu, W., Ni, J., Liu, Z., & Liu, C. In IEEE Transactions on Computers, 2019.
Theoretical Analysis of Delay-based PUFs and Design Strategies for Improvement.
Wang, Y., Wang, C., Gu, C., Cui, Y., O'Neill, M., & Liu, W. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings [8702722] Institute of Electrical and Electronics Engineers Inc., 2019.
XOR-Based Low-Cost Reconfigurable PUFs for IoT Security.
Liu, W., Zhang, L., Zhang, Z., Gu, C., Wang, C., O'Neill, M., & Lombardi, F. In ACM Transactions on Embedded Computing Systems, 2019.
A Machine Learning Attack Resistant Multi-PUF Design on FPGA.
Ma, Q., Gu, C., Hanley, N., Wang, C., Liu, W., & O'Neill, M.In 23rd Asia and South Pacific Design Automation Conference (ASP-DAC): Proceedings (pp. 97-104). IEEE Circuits and Systems Society, 2018.
Approximate computing and its application to hardware security.
Liu, W., Gu, C., Qu, G., & O'Neill, M. In Cyber-Physical Systems Security (pp. 43-67). Springer International, 2018.
A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations.
Gu, C., Liu, W., Hanley, N., Hesselbarth, R., & O'Neill, M. In IEEE Transactions on Computers, 2018.
Compact, Scalable and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography.
Khalid, A., Howe, J., Rafferty, C., Regazonni, F., & O'Neill, M.In IEEE International Symposium on Circuits and Systems (ISCAS) 2018 (pp. 1-5). IEEE, 2018.
Data Compression Device based on Modified LZ4 Algorithm.
Liu, W., Mei, F., Wang, C., O'Neill, M., & Swartzlander, E. E. In IEEE Transactions on Consumer Electronics, 64(1), 110-117, 2018.
Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography.
Fan, S., Liu, W., Howe, J., Khalid, A., & O'Neill, M. In IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) 2018: Proceedings IEEE, 2018.
Physical protection of lattice-Based cryptography - Challenges and solutions
Khalid, A., O’ Neill, M., Oder, T., Güneysu, T., Valencia, F., & Regazzoni, F.In GLSVLSI 2018: Proceedings of the 2018 Great Lakes Symposium on VLSI (pp. 365-370). Association for Computing Machinery, 2018.
Ultra-lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design.
Cui, Y., Gu, C., Wang, C., O'Neill, M., & Liu, W. In IEEE Access, 6, 28478-28487, 2018.
Plundervolt: Software-based Fault Injection Attacks against Intel SGX
K. Murdock, D. Oswald, F. D. Garcia, J. V. Bulck, D. Gruss & F. Piessens. In Proceedings of the 41st IEEE Symposium on Security and Privacy (S&P'20), 2020.
Breaking Bootloaders on the Cheap
Q. Temeiza & D. Oswald. Presentation at Blackhat Europe, 2019.
A Tale of Two Worlds: Assessing the Vulnerability of Enclave Shielding Runtimes
J. Van Bulck, D. Oswald, E. Marin, A. Aldoseri, F. D. Garcia & F. Piessens. In Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security - ACM CCS '19, 1741-1758, 2019.
Dismantling DST80-based Immobiliser Systems
L. Wouters, J V den Herrewegen, F. D. Garcia, D. Oswald, B. Gierlichs and B. Preneel. In proceedings of Transactions on Cryptographic Hardware and Embedded Systems, 2020.
Fast, Furious and Insecure: Passive Keyless Entry and Start Systems in Modern Supercars
L. Wouters, E. Marin, T. Ashur, B. Gierlichs and B. Preneel. In proceedings of Transactions on Cryptographic Hardware and Embedded Systems (TCHES 2019).
IFAL: Issue First Activate Later Certificates for V2X
E. Verheul. C. Hicks and F. D. Garcia. In proceedings of IEEE European Symposium on Security and Privacy (Euro S&P 2019).
Making Contactless EMV Robust Against Rogue Readers Colluding With Relay Attackers
Tom Chothia, Ioana Boureanu, and Liqun Chen. In Financial Cryptography and Data Security (FC), 2019.
FENL: an ISE to mitigate analogue micro-architectural leakage
S. Gao and B. Marshall and D. Page and T. Pham. In IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), 2020.
Share slicing: friend or foe?
S. Gao and B. Marshall and D. Page and E. Oswald. In IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020.
On Hardware Verification In An Open Source Context
B. Marshall. In Open Source Design Automation (OSDA), 2019.
Provable-Security Model for Strong Proximity-based Attacks – with application to contactless payments
I. Boureanu, L. Chen and S. Ivey. In 15th ACM ASIA Conference on Computer and Communications Security, 2020.
Plundervolt - RISE Impact Case Study
M. Ryan, F. Garcia, D. Oswald, E. Marin, University of Birmingham, 2020.
Thunderclap - RISE Impact Case Study
R. Watson, S. Moore, A. Markettos, University of Cambridge, 2020.
Lightweight Modeling Attack-Resistant Multiplexer-Based Multi-PUF (MMPUF) Design on FPGA
Y. Cui, C. Gu, Qingqing Ma, Yue Fang, C. Wang, M. O’Neill and W. Liu Electronics 2020, 9, 815.
Ten years of Hardware Trojans; A Survey from the Attacker’s perspective
M. Xue, C. Gu, W Liu, S. Yu, M. O’Neill In IET Computer and Digital Techniques, pp 231-246, October 2020.
Plaintext: A Missing Feature for Enhancing the Power of Deep Learning in Side-Channel Analysis?
A-T. Hoang, N. Hanley, M.O’Neill In IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), Volume 202, Issue 4, August 2020.
Fast DRAM PUFs on Commodity Devices
J. Miskelly, M. O’Neill In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol 39 (11), pp 3566-3576, November 2020.
A Large Scale Comprehensive Evaluation of Single Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs
C. Gu, C.H. Chang, W. Liu, N. Hanley, J.Miskelly, M. O’Neill In Journal of Cryptographic Engineering, December 2020.
A Modeling Attack Resistant Deception Technique for Securing Lightweight-PUF based Authentication
C. Gu, C. H. Chang, W. Liu, S. Yu, Y. Wang, M. O’Neill In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), November 2020.
DTA-PUF: Dynamic Timing Aware Physical Unclonable Function for Resource Constrained Devices
I. Tsiokanos, J. Miskelly, C. Gu, M. O'Neill & G. Karakonstantis In ACM Journal on Emerging Technologies in Computing, 2020.
Lightweight Configurable Ring Oscillator PUF based on RRAM/CMOS Hybrid Circuits
Y. Cui, C. Gu, C. Wang, W. Liu M. O’Neill, F. Lombardi In IEEE Open Journal of Nanotechnology, pp, 128-134, November 2020.
A Dynamic Configurable PUF and Dynamic Matching Authentication Protocol
Y. Wang, C. Wang, C. Gu, Y, Cui, M. O’Neill, W. Liu In IEEE Transactions on Emerging Topics in Computing, accepted April 2021.
rkt-io: A Direct I/O Stack for Shielded Execution
J. Thalheim, H. Unnibhavi, C. Priebe, P. Bhatotia, P. Pietzuch ACM EuroSys 2021.
Avocado: A secure in-memory storage system
M. Bailleu, D. Giantsidi, V. Gavrielatos, Le Quoc Do, V. Nagarajan, P. Bhatotia USENIX ATC 2021.
Steel: Composable Hardware-based Stateful and Randomised Functional Encryption
P. Bhatotia, M. Kohlweiss, L. Martinico, Y. Tselekounis PKC 2021.
Beneath the Bonnet: A Breakdown of Diagnostic Security
J Van den Herrewegen, FD Garcia In European Symposium on Research in Computer Security (ESORICS'18), 305-324.
Dismantling the AUT64 Automotive Cipher
C. Hicks, F.D. Garcia, D. Oswald. In Transactions on Cryptographic Hardware and Embedded Systems (TCHES). Vol. 2018, No.2, pages 1-24, 2018.
Modelling of 802.11 4-Way Handshake Attacks and Analysis of Security Properties
R.R. Singh, J. Moreira, T. Chothia, M.D. Ryan International Workshop on Security and Trust Management, 3-21, 2020.
Plundervolt: How a little bit of undervolting can create a lot of trouble
K. Murdock, D. Oswald, F.D. Garcia, J.V. Bulck, D. Gruss, F. Piessens In IEEE Security & Privacy special issue on Hardware-Assisted Security. Vol 18 , Issue 5, p28 - 37, 2020.
A Vehicular DAA Scheme for Unlinkable ECDSA Pseudonyms in V2X
C. Hicks and F.D. Garcia In 5th IEEE European Symposium on Security and Privacy (EuroS&P 2020).
Faulty Point Unit: ABI Poisoning Attacks on Intel SGX
F. Alder, J.V. Bulck, D. Oswald, F. Piessens Annual Computer Security Applications Conference – ACSAC’20.
VoltPillager: Hardware-based fault injection attacks against Intel SGX Enclaves using the SVID voltage scaling interface
Z. Chen, G. Vasilakis, K. Murdock, E. Dean, D. Oswald, F.D. Garcia In 30th USENIX Security Symposium (USENIX Security 2021).
Fill your Boots: Enhanced Embedded Bootloader Exploits via Fault Injection and Binary Analysis
J.V. den Herrewegen, D. Oswald, F.D. Garcia, Q. Temeiza In Transactions on Cryptographic Hardware and Embedded Systems (TCHES),Vol. 2021, issue 1, 2021.
Cutting Through the Complexity of Reverse Engineering Embedded Devices
S.L. Thomas, J.V. den Herrewegen, G. Vasilakis, Z. Chen, M. Ordean, F.D. Garcia In Transactions on Cryptographic Hardware and Embedded Systems (TCHES), Vol. 2021, issue 3. 2021.
Magnifying Side-Channel Leakage of Lattice-Based Cryptosystems with Chosen Ciphertexts: The Case Study of Kyber
Z. Xu, O. Pemberton, S.S. Roy, D. Oswald IACR eprint, 2020.
PLATYPUS: Software-based Power Side-Channel Attacks on x86
M. Lipp, A. Kogler, D. Oswald, M. Schwarz, C. Easdon, C. Canella, D. Gruss IEEE Symposium on Security and Privacy (SP) 2021.
CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment
Brooks Davis, Robert N. M. Watson, Alexander Richardson, Peter G. Neumann, Simon W. Moore, John Baldwin, David Chisnall, Jessica Clarke, Nathaniel Wesley Filardo, Khilan Gudka, Alexandre Joannou, Ben Laurie, A. Theodore Markettos, J. Edward Maste, Alfredo Mazzinghi, Edward Tomasz Napierala, Robert M. Norton, Michael Roe, Peter Sewell, Stacey Son, and Jonathan Woodruff In Proceedings of 2019 Architectural Support for Programming Languages and Operating Systems (ASPLOS’19). Providence, RI, USA, April 13-17, 2019.
CHERI Concentrate: Practical Compressed Capabilities
Brooks Davis, Robert N. M. Watson, Alexander Richardson, Peter G. Neumann, Simon W. Moore, John Baldwin, David Chisnall, Jessica Clarke, Nathaniel Wesley Filardo, Khilan Gudka, Alexandre Joannou, Ben Laurie, A. Theodore Markettos, J. Edward Maste, Alfredo Mazzinghi, Edward Tomasz Napierala, Robert M. Norton, Michael Roe, Peter Sewell, Stacey Son, and Jonathan Woodruff In IEEE Transactions on Computers, 10.1109/TC.2019.2914037, IEEE, 2019.
CHERIvoke: Characterising Pointer Revocation using CHERI Capabilities for Temporal Memory Safety
Hongyan Xia, Jonathan Woodruff, Sam Ainsworth, Nathaniel W. Filardo, Michael Roe, Alexander Richardson, Peter Rugg, Peter G. Neumann, Simon W. Moore, Robert N. M. Watson, and Timothy M. Jones In Proceedings of the 52nd IEEE/ACM International Symposium on Microarchitecture (IEEE MICRO 2019). Columbus, Ohio, USA, October 12-16, 2019.
Rigorous engineering for hardware security: Formal modelling and proof in the CHERI design and implementation process
Kyndylan Nienhuis, Alexandre Joannou, Thomas Bauereiss, Anthony Fox, Michael Roe, Brian Campbell, Matthew Naylor, Robert M. Norton, Simon W. Moore, Peter G. Neumann, Ian Stark, Robert N. M. Watson, and Peter Sewell In Proceedings of the 41st IEEE Symposium on Security and Privacy (Oakland 2020). San Jose, CA, USA, May 18-20, 2020.
Cornucopia: Temporal Safety for CHERI Heaps
Nathaniel Wesley Filardo, Brett F. Gutstein, Jonathan Woodruff, Sam Ainsworth, Lucian Paul-Trifu, Brooks Davis, Hongyan Xia, Edward Tomasz Napierala, Alexander Richardson, John Baldwin, David Chisnall, Jessica Clarke, Khilan Gudka, Alexandre Joannou, A. Theodore Markettos, Alfredo Mazzinghi, Robert M. Norton, Michael Roe, Peter Sewell, Stacey Son, Timothy M. Jones, Simon W. Moore, Peter G. Neumann, and Robert N. M. Watson In Proceedings of the 41st IEEE Symposium on Security and Privacy (Oakland 2020). San Jose, CA, USA, May 18-20, 2020.
Position Paper: Defending Direct Memory Access with CHERI Capabilities
A. Theodore Markettos, John Baldwin, Ruslan Bukin, Peter G. Neumann, Simon W. Moore, and Robert N.M. Watson Hardware and Architectural Support for Security and Privacy (HASP) 2020, October 2020.
ZUCL 2.0: Virtualised memory and communication for ZYNQ UltraScale+ FPGAs
K. Pham, K. Paraskevas, A. Vaishnav, A. Attwood, M. Vesper and D Koc FSP, 2019.
Invited tutorial: FPGA hardware security for datacenters and beyond
K. Matas, T. La, N. Grunchevski, K. Pham and D. Koch ACM/SIGDA FPGA, 2020.
Power-hammering through glitch amplification–attacks and mitigation
K. Matas, T. La, K. Pham and D. Koch 28th IEEE FPT Symposium, 2020.
FPGADefender Malicious Self-oscillator Scanning for Xilinx UltraScale+ FPGAs
T. La, K. Matas, N. Grunchevski, K. Pham and D. Koch ACM (TRETS) 13 (3), 1-31.
Denial-of-Service on FPGA-based Cloud Infrastructure - Attack and Defense
T. La, K. Pham, J. Powell and D. Koch TCHES Vol. 2021, # 3.
Trusted Configuration in Cloud FPGAs
S Zeitouni, J Vliegen, T Frassetto, D Koch, AR Sadeghi and N Mentens FCCM 2021.
Building a Modern TRNG: An Entropy Source Interface for RISC-V
M.-J. O. Saarinen, G.R. Newell, and B. Marshall In Attacks and Solutions in Hardware Security (ASHES), 2020.
Implementing the Draft RISC-V Scalar Cryptography Extensions
B. Marshall, D. Page, and T. Pham In Hardware and Architectural Support for Security and Privacy (HASP), 2020.
The design of scalar AES Instruction Set Extensions for RISC-V
B. Marshall, G.R. Newell, D. Page, M.-J. O. Saarinen, and C. Wolf In IACR Transactions on Cryptographic Hardware and Embedded Systems, 2021(1), 109--136, 2020.
MIRACLE: MIcRo-ArChitectural Leakage Evaluation
B. Marshall, D. Page, and J. Webb In Cryptology ePrint Archive, Report 2021/261, 2021.
Distance Bounding Under Different Assumptions
T. Chothia, I. Boureanu, L. Chen In 23rd International Conference on Financial Cryptography and Data Security (Financial Crypto 2019).
Here and there at once with my mobile phone
I. Boureanu, D. Gerault, J. Lewis In 16th International Conference on Security and Cryptography (Secrypt 2019).
Relay Attacks to Distance Bounding Protocols
G. Avoine, I. Boureanu, D. Gérault, G. P. Hancke, P. Lafourcade, C. Onete Chapter in book "Security of Ubiquitous Computing Systems", editors Gildas Avoine, Julio Hernandez-Castro, Springer.
Provable-Security Model for Strong Proximity-based Attacks: With Application to Contactless Payments
I. Boureanu, S. Ivey, L. Chen 15th ACM Asia Conference on Computer and Communications Security (ACM ASIACCS 2020).
Security Analysis and Implementation of Relay-Resistant Contactless Payments
I. Boureanu, T. Chothia, A. Debant, S. Delaune 27th ACM Conference on Computer and Communications Security (ACM CCS 2020).
Mechanised Models and Proofs for Distance-Bounding
I. Boureanu, C. C. Dragan, D. Gerault, F. Dupressoir, P. Lafourcade 2021 IEEE Computer Security Foundations Symposium (CSF) 2021.
RISE Annual Report 2021
ukrise.org